In the news

This entry will be continuously edited: it is meant to function as a news feed with links to online articles.

Sonics has just boosted the speed of its NoC to 1GHz.

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Epiphany, multicore programming online articles

William Wong recently wrote two online articles. The first article is on Adapteva’s Epiphany 32-bit, single precision floating-point multicore architecture (its eMesh consists of 13 networks: this reminds me of a point that professor Anant Agarwal made in his NOCS’11 keynote speech: NoCs are cheap, so just throw them on to the chip), which targets low-power embedded applications. The second article is on multicore programming.

Multicore Array Targets Embedded Applications
Get Ready For Some Hard Work With Multicore Programming

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To publish or to patent?

I wonder how many of the people from the NoC community are aware of patents
in this area. I recently run into some and was not too surprised.
I guess that when one does not see too many papers published by researchers
from given institutions/corporations, one should expect some activity on the
patents front instead. 🙂
Here are some examples; I’ll leave it to you to figure out what’s new:
http://www.freepatentsonline.com/result.html?query_txt=network+on+chip&sort=relevance&srch=top&search=
http://www.faqs.org/patents/inventor/eric-o-mejdrich-rochester-us-1/
(note that one is even called simply “network on chip” :-))

Posted in Opinions | 1 Comment

Research groups

Here is a list (alphabetical order) of groups involved in NoC research. This is a list of groups not of people. This list is far from being complete! New entries are added all the time. If you want/think your group to be listed here, please let me know.

BONE NoC Research Group, KAIST, Korea
Carbon Research Group, MIT
Comcas
EOLAB at University of Cagliari
Hardware Design Support Group (GAPH), Brazil
Integrated systems lab at EPFL
Integrated CMOS Photonics at MIT
Intel
Lightwave Research Laboratory at Columbia
Li-Shiuan Peh (LSP) group at MIT
Mobile Computing System Lab, Hong Kong
NaNoC design platform
NoCBench at Tampere University of Technology, Finland
Nostrum at KTH
NOC Research Group, Institute MD, University of Rostock
Parallel architectures group (GAP) at Universidad Politécnica de Valencia
Stanford interconnection network research
System level design (SLD) group at CMU
System level design group at Columbia
Technion

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Teaching materials

Here is a list of pointers to various teaching materials including course webpages (which are completely or partially dedicated to NoCs), presentations, videos, etc. This is always an incomplete list. I will keep adding items as we go. If you know of a link, which should be included here please let us know.

1. Course webpages
Colorado State University
Cornell
North Dakota State University (NDSU) 🙂
University of Toronto

2. Talks
Talks at Technion MATRICS project

3. Online bibliographies
Optical Network-on-Chip Bibliography, Hong Kong
On-Chip Networks Bibliography (not maintained since 2007), UK
Open Core Protocol International Partnership (OCP-IP)

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Related blogs

Here is an incomplete and under continuous development list of related blogs.

http://info.arteris.com/blog
http://www.sonicsinc.com/blog/
http://computerarch.com
http://utaharch.blogspot.com/search/label/NoC
http://www.multicoreinfo.com/related-blogs/
http://blogs.msdn.com/b/satnam_singh/

Some blogs, not completely unrelated and good to read anyways.

http://eda360insider.wordpress.com/

Posted in Network-on-Chip, Opinions, Related blogs | Leave a comment

Companies

A (probably) incomplete list of (start-up) companies related to NoCs:

Adapteva
Arteris
Inocs
Intel (“Knights Landing” Xeon Phi)
Kalray
NetSpeed
Recore Systems
Sonics
Tilera
GreenArrays – Can anyone figure out how their 144 cores on G144 chip communicate with each other?

Also, here is a list of NoC related EDA tools. This list could be very well included as a subsection of Simulators post. However, it is included here because these are tools from companies.

Qsys – Altera’s System Integration Tool

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