1. NoC prototypes: full design data available
Here is a list of past and current NoC prototyping efforts either on FPGAs or as VLSI circuits. If you know of others and wanted them listed here please let me know. These are efforts where design data are publicly available:
— CONfigurable NEtwork Creation Tool (CONNECT), CMU – Online BlueSpec SystemVerilog generator for NoCs that are “FPGA-friendly”, 2012
— NetMaker (University of Cambridge) – FPGA, 2009
— Open Noc (Linköpings Universitet) – FPGA, 2007
— Mini NoC (Technische Universiteit Eindhoven) – FPGA, 2006
2. NoC prototypes: partial/no/promised design data available
Here is a list of people, publications, or pointers to reported NoC prototypes; however, no complete design data are publicly available:
— Atlas (GAPH, PUCRS, Brazil. One can simulate different NoC topologies and generate VHDL files, which then could be synthesized. The authors reported FPGA implementation.) – 2011
— NoCGen: an environment for the Hermes NoC emulation (Grenoble Institute of Technology). NoCGen uses the Hermes NoC developed by the PUCRS of Porte Allegre, Brazil. – FPGA, 2011
— NoCBench, Tampere University of Technology. Only limited design data are available. That includes some libs too.) – 2009.
3. Router prototypes
Here is a list of efforts that focused on the router architecture. VHDL/Verilog implementations available.
— Open source NoC router (Stanford. A parameterized RTL implementation of a state-of-the-art VC router.) – 2013