Now, I have not written a new post for a while… I was thinking about it and I realized that while we have been looking at tools, teaching materials, calls for papers, etc., we have not looked at funding. How much money is placed on NoC research? And where does the money go? So, I did a quick search on NSF award advanced-search. I used the following Keyword: “NoC” “on-chip” “network-on-chip” “networks-on-chip” “interconnection network”. The search returned 264 awards. More than half of the results are not really related to NoCs, but other than that the rough distribution is:
Less than or equal $50,000 (5)
Between $50,001 – $100,000 (11)
Between $100,001 – $500,000 (211)
Between $500,001 – $1,000,000 (22)
More than $1,000,000 (7)
If we click on Refine Search by state, we can see the number of awards by state. Here are the top 5 “lion share”s :
It turns out that this NoC Blog is visited a lot because people search for “NoC simulator”. So, I decided to try to find out what simulators are the most popular. Please participate. If you used or are using an NoC simulator vote for it here.
This post is an experiment; it is kind of a craigslist for NoCs. Its purpose is to foster networking and collaboration (in addition to the traditional “methods” of: networking done via conference participation, or friends of friends, or friends of advisor :-), or sending email with question about published paper). If it will work out, then I will make it more formal. For the time being we will use the method of leaving comments to this post. The idea of this post came to me from a recent comment on a different post, Prototypes, of this blog. If you are a (NoC) researcher and are looking for collaborators in the area of NoC please leave a comment here with the specific NoC topic on which you work or plan to work and look for collaborators. Potential collaborators then could contact you directly.
For example, if you developed a say adaptive routing algorithm, which you already verified with an NoC simulator, but also wanted to validate it on a say “some system like a video decoder” FPGA prototype, you may want to look for someone with prior experience to collaborate with on this aspect and in this way get it done faster.
1. NoC prototypes: full design data available
Here is a list of past and current NoC prototyping efforts either on FPGAs or as VLSI circuits. If you know of others and wanted them listed here please let me know. These are efforts where design data are publicly available:
3. Router prototypes
Here is a list of efforts that focused on the router architecture. VHDL/Verilog implementations available.
– Open source NoC router (Stanford. A parameterized RTL implementation of a state-of-the-art VC router.) – 2013
Recently Synopsys acquired Magma. This made me think of the recent lawsuit from the world of on-chip networks of Sonics against Arteris. What I mean is this possible scenario: A big fish sues a smaller fish. The lawsuit battle will drain a lot of financial resources from both fish. However, the smaller fish will likely suffer more from this and its price will decrease significantly (I know this because for example Magma’s stock price plummeted after being sued by Synopsys back in 2004; at the time I had just joined Magma and the value of my hiring stocks options vanished over night :-)). Once the smaller fish is cheap and possibly recovering: buy it. At the end of the day, lawyers prosper and have nice exotic “sea-food dinners” all around the Bay Area :-). Writing this reminded me of a recent video I watched: Debate on the Proposition that Software Patents Encourage Innovation. I could not agree more with Prof. Edward A. Lee.
William Wong recently wrote two online articles. The first article is on Adapteva’s Epiphany 32-bit, single precision floating-point multicore architecture (its eMesh consists of 13 networks: this reminds me of a point that professor Anant Agarwal made in his NOCS’11 keynote speech: NoCs are cheap, so just throw them on to the chip), which targets low-power embedded applications. The second article is on multicore programming.